Ðþí  &š   8     (            ’  Ð                                                         xlnx,microblaze          &edk131     memory@50000000          ,memory           8P            aliases          </axi/axi-ethernet@82780000           F/axi/serial@83e00000          chosen           N console=ttyS0,115200            W/axi/serial@83e00000          cpus                          c                   cpu@0            iëÂ          xlnx,microblaze-8.10.a           yP            Š_ÿÿÿ         ›             ­            ,cpu          ºP            Ë_ÿÿÿ         Ü             î            &microblaze,8.10.a            8             ûëÂ                    !           6           K            _            }           ’                      ¨            ³            Â           ×           ï                                   9           O           d            x           ’            ¦           ¹           Ñ           é                                  )virtex6         5            I           \ëÂ         f            y            Œ            ›           ¦           ±            ¼           Ô            ë                                   3            G            [            o           ‰microblaze_0            —           ©            À           Ó           æ                                   #           9            T            o           ‡            ™           ¢            ±            À            Ï            Ø            ñ                                  8           H           U           f           z            –           £           ³           Ã           Ö           ã           ö           
             axi                                (   xlnx,axi-interconnect-1.02.a simple-bus          $   axi-ethernet@82780000           +         2   xlnx,axi-ethernet-2.01.a xlnx,axi-ethernet-1.00.a            ,network         ?           P              [ 
5 "          m            8‚x             x                        Ž           ž            °           ¾0B00001         Ë            ×           â            ó                                                +           6            G            W            h      mdio                                 phy@7            marvell,88e1111          ,ethernet-phy             8           r               axi-dma@84600000             xlnx,axi-dma-3.00.a         ?           P                      8„`             z  â        )virtex6         ‘           £           ¹           Ë           á           ö            	           	$           	?           	]           	r           r         serial@83e00000          iõá       =   xlnx,axi-uart16550-1.01.a xlnx,xps-uart16550-2.00.a ns16550a            	Œ  %€         ,serial          ?           P               8ƒà             	š           	¥           	¯}x@        )virtex6         	È            	ß            	õ           
            
          system-timer@83c00000            iõá       ,   xlnx,axi-timer-1.01.a xlnx,xps-timer-1.00.a         ?           P                8ƒÀ             
.            )virtex6         
?           
P           
a            
u           
‡         interrupt-controller@81800000           
™         *   xlnx,axi-intc-1.01.a xlnx,xps-intc-1.00.a            
ª         8€             
¿           
Ñ           r         flash@86000000                                   
æ            xlnx,axi-emc-1.01.a cfi-flash            8†              
ñ  '        )virtex6                    *            L            n                        ¬           ¿           Î           Þ            í            ý                                    +            ;           N            e            |            “            ª            ¼            Ö            ð         	  AXI4LITE                         :            Taxi4            l           ƒ           š           ±           È ûÐ        Ü  :˜        ð  :˜          :˜         ûÐ        ,  :˜        @  :˜        T  :˜        h  ˆ¸        |  X          X        ¤  X        ¸  X        Ì  X        à  X        ô  X          ˆ¸                    0            D            X  a¨        n  a¨        „  a¨        š  a¨        °  2È        Â  :˜        Ô  :˜        æ  :˜        ø p        
  .à          .à        .  .à        @  .à        S  .à        f  .à        y  .à   partition@0         Œfpga             8             partition@100000            Œboot             8            partition@140000            Œbootenv          8            partition@160000            Œconfig           8            partition@180000            Œimage            8             partition@b80000            Œspare            8 ¸                     	#address-cells #size-cells compatible model device_type reg ethernet0 serial0 bootargs stdout-path #cpus clock-frequency d-cache-baseaddr d-cache-highaddr d-cache-line-size d-cache-size i-cache-baseaddr i-cache-highaddr i-cache-line-size i-cache-size timebase-frequency xlnx,addr-tag-bits xlnx,allow-dcache-wr xlnx,allow-icache-wr xlnx,area-optimized xlnx,branch-target-cache-size xlnx,cache-byte-size xlnx,d-axi xlnx,d-lmb xlnx,d-plb xlnx,data-size xlnx,dcache-addr-tag xlnx,dcache-always-used xlnx,dcache-byte-size xlnx,dcache-data-width xlnx,dcache-force-tag-lutram xlnx,dcache-interface xlnx,dcache-line-len xlnx,dcache-use-fsl xlnx,dcache-use-writeback xlnx,dcache-victims xlnx,debug-enabled xlnx,div-zero-exception xlnx,dynamic-bus-sizing xlnx,ecc-use-ce-exception xlnx,edge-is-positive xlnx,endianness xlnx,family xlnx,fault-tolerant xlnx,fpu-exception xlnx,freq xlnx,fsl-data-size xlnx,fsl-exception xlnx,fsl-links xlnx,i-axi xlnx,i-lmb xlnx,i-plb xlnx,icache-always-used xlnx,icache-data-width xlnx,icache-force-tag-lutram xlnx,icache-interface xlnx,icache-line-len xlnx,icache-streams xlnx,icache-use-fsl xlnx,icache-victims xlnx,ill-opcode-exception xlnx,instance xlnx,interconnect xlnx,interrupt-is-edge xlnx,mmu-dtlb-size xlnx,mmu-itlb-size xlnx,mmu-privileged-instr xlnx,mmu-tlb-access xlnx,mmu-zones xlnx,number-of-pc-brk xlnx,number-of-rd-addr-brk xlnx,number-of-wr-addr-brk xlnx,opcode-0x0-illegal xlnx,optimization xlnx,pvr xlnx,pvr-user1 xlnx,pvr-user2 xlnx,reset-msr xlnx,sco xlnx,stream-interconnect xlnx,unaligned-exceptions xlnx,use-barrel xlnx,use-branch-target-cache xlnx,use-dcache xlnx,use-div xlnx,use-ext-brk xlnx,use-ext-nm-brk xlnx,use-extended-fsl-instr xlnx,use-fpu xlnx,use-hw-mul xlnx,use-icache xlnx,use-interrupt xlnx,use-mmu xlnx,use-msr-instr xlnx,use-pcmp-instr xlnx,use-stack-protection ranges axistream-connected interrupt-parent interrupts local-mac-address phy-handle xlnx,avb xlnx,halfdup xlnx,include-io xlnx,mcast-extend xlnx,phy-type xlnx,phyaddr xlnx,rxcsum xlnx,rxmem xlnx,rxvlan-strp xlnx,rxvlan-tag xlnx,rxvlan-tran xlnx,stats xlnx,txcsum xlnx,txmem xlnx,txvlan-strp xlnx,txvlan-tag xlnx,txvlan-tran xlnx,type phandle xlnx,dlytmr-resolution xlnx,include-mm2s xlnx,include-mm2s-dre xlnx,include-s2mm xlnx,include-s2mm-dre xlnx,mm2s-burst-size xlnx,prmry-is-aclk-async xlnx,s2mm-burst-size xlnx,sg-include-desc-queue xlnx,sg-include-stscntrl-strm xlnx,sg-length-width xlnx,sg-use-stsapp-length current-speed reg-offset reg-shift xlnx,external-xin-clk-hz xlnx,has-external-rclk xlnx,has-external-xin xlnx,is-a-16550 xlnx,use-modem-ports xlnx,use-user-ports xlnx,count-width xlnx,gen0-assert xlnx,gen1-assert xlnx,one-timer-only xlnx,trig0-assert xlnx,trig1-assert #interrupt-cells interrupt-controller xlnx,kind-of-intr xlnx,num-intr-inputs bank-width xlnx,axi-clk-period-ps xlnx,include-datawidth-matching-0 xlnx,include-datawidth-matching-1 xlnx,include-datawidth-matching-2 xlnx,include-datawidth-matching-3 xlnx,include-negedge-ioregs xlnx,max-mem-width xlnx,mem0-type xlnx,mem0-width xlnx,mem1-type xlnx,mem1-width xlnx,mem2-type xlnx,mem2-width xlnx,mem3-type xlnx,mem3-width xlnx,num-banks-mem xlnx,parity-type-mem-0 xlnx,parity-type-mem-1 xlnx,parity-type-mem-2 xlnx,parity-type-mem-3 xlnx,s-axi-en-reg xlnx,s-axi-mem-addr-width xlnx,s-axi-mem-data-width xlnx,s-axi-mem-id-width xlnx,s-axi-mem-protocol xlnx,s-axi-reg-addr-width xlnx,s-axi-reg-data-width xlnx,s-axi-reg-protocol xlnx,synch-pipedelay-0 xlnx,synch-pipedelay-1 xlnx,synch-pipedelay-2 xlnx,synch-pipedelay-3 xlnx,tavdv-ps-mem-0 xlnx,tavdv-ps-mem-1 xlnx,tavdv-ps-mem-2 xlnx,tavdv-ps-mem-3 xlnx,tcedv-ps-mem-0 xlnx,tcedv-ps-mem-1 xlnx,tcedv-ps-mem-2 xlnx,tcedv-ps-mem-3 xlnx,thzce-ps-mem-0 xlnx,thzce-ps-mem-1 xlnx,thzce-ps-mem-2 xlnx,thzce-ps-mem-3 xlnx,thzoe-ps-mem-0 xlnx,thzoe-ps-mem-1 xlnx,thzoe-ps-mem-2 xlnx,thzoe-ps-mem-3 xlnx,tlzwe-ps-mem-0 xlnx,tlzwe-ps-mem-1 xlnx,tlzwe-ps-mem-2 xlnx,tlzwe-ps-mem-3 xlnx,tpacc-ps-flash-0 xlnx,tpacc-ps-flash-1 xlnx,tpacc-ps-flash-2 xlnx,tpacc-ps-flash-3 xlnx,twc-ps-mem-0 xlnx,twc-ps-mem-1 xlnx,twc-ps-mem-2 xlnx,twc-ps-mem-3 xlnx,twp-ps-mem-0 xlnx,twp-ps-mem-1 xlnx,twp-ps-mem-2 xlnx,twp-ps-mem-3 xlnx,twph-ps-mem-0 xlnx,twph-ps-mem-1 xlnx,twph-ps-mem-2 xlnx,twph-ps-mem-3 label 